1. Field of the Invention
This invention relates to a semiconductor manufacturing technology and, more particularly, to a method for improving the electrical property of gate in a polycide structure.
2. Description of the Prior Art
Polysilicon is used as the gate electrode in modern ULSI(ultra-large scale integration) MOS devices. Along with the increasing density of integration, propagation of signals becomes a great problem because linewidth becomes narrower and line length becomes longer. So a material with low resistivity and high melting point is necessary instead of polysilicon. Refractory metal silicides having polysilicon as underlayer are often used to meet said requirements. Tungsten silicide (WSi.sub.x, x.apprxeq.2.2-2.6) is the most commonly used silicide nowadays. This structure is shown in FIG. 1. A gate oxide 12 is formed on substrate 11, then polysilicon 13 is deposited on said gate substrate, finally silicide 14 is deposited on said polysilicon. After definition through lithography processes, a polycide gate structure is formed.
However, there are some issues that have to be overcomed when tungsten silicide is deposited on gate polysilicon. Firstly, tungsten the silicide films have high stress (.about.1000 Mpa), so during subsequent high temperature processes, such as post-annealing, peeling of silicide film has been a problem. In addition, as reported in the paper entitled, "Direct Evidence of Gate Oxide Thickness Increase In Tungsten Polycide Process" by S. L. Hsu et al, IEEE Electron Device Letters, Vol. 12, No. 11, November 1991, pp.623-625, the fluorine atoms which diffuse from tungsten silicide films to gate oxides cause additional growth. This additional gate oxide will cause the degradation of electrical breakdown field of SiO.sub.2 and a decrease in saturation current to degrade the device performance.
The fluorine atoms just mentioned are emitted from one of the reactant gases, hexafuoride tungsten (WF.sub.6), during the deposition of silicide. And because polysilicon underlying silicide offers a lot of grain boundaries for fluorine atoms to go along with and through into the gate oxide. One approach that has been suggested to overcome this problem is reported by J. B. Price et al in Semicon West, May 10, 1986, where high temperature CVD tungsten silicide employing dichlorosilane (SiH.sub.2 Cl.sub.2) and hexafluoride tungsten (WF.sub.6) was used instead of monosilane (SiH.sub.4) and WF.sub.6. It has the advantage of lower concentration of fluorine atoms. Another approach is set forth in U.S. Pat. No. 5,364,803. According to the teaching therein and as illustrated in FIG. 2, a thin conducting diffusion barrier layer 21, titanium nitride, is deposited overlying the gate polysilicon to prevent fluorine atoms from diffusing into the gate polysilicon layer. But the additional layer of titanium nitride complicates the processes, especially the following etching process, because titanium nitride needs different etching gases from which of polysilicon. So a practical way is to prevent penetration of fluorine atoms by improving the structure of polysilicon gate structure. One related approach was mentioned in U.S. Pat. No. 5,441,904, where a two-layered polysilicon gate is formed with different grain sizes through different reactants to prevent the diffusion of fluorine atoms. The two-layered polysilicon gate is not so practical for two times of deposition of polysilicon with different reactant gases. So a practical and economic method is disclosed in the present invention to provide for an improved polycide gate structure.